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\caption{\label{tab:authors} Author List }
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\begin{tabular}{|c||c||c||c|}
\hline
\textbf{Name} & \textbf{Affiliation} & \textbf{Contact Number} & \textbf{E-Mail Address} \\ \hline
Karthik Swaminathan & Dept. of Computer Science and Engg. & 814-251-4686 & kvs120@cse.psu.edu \\
& Pennsylvania State University & &\\ \hline
Jack Sampson & Dept. of Computer Science and Engg.& 814-863-4888 & sampson@cse.psu.edu \\ 
& Pennsylvania State University & &\\ \hline
Vijaykrishnan Narayanan & Dept. of Computer Science and Engg. & 814-863-0392 & vijay@cse.psu.edu \\ 
& Pennsylvania State University & &\\ \hline
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\title{A re-examination of instruction, thread and data-level parallelism in the context of emerging technologies}

\author{
Karthik Swaminathan, Jack Sampson, and
Vijaykrishnan Narayanan 
}

\affil{The Pennsylvania State University}
%\affil[2]{Intel Corp}

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%\author{
%Karthik Swaminathan, 
%Emre Kultursay, 
%Vinay Saripalli,\\
%Vijaykrishnan Narayanan, 
%Mahmut Kandemir,
%Suman Datta, \\
%The Pennsylvania State University
%}

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\begin{abstract}
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%\section{keywords}
%\emph{Steep-slope devices, Dark/Dim Silicon, CMOS-TFET heterogeneous architectures, DVFS, thread migration, power partitioning.}

\section{Introduction}
%Introduction and motivation
%~\cite{codes12}
\label{sec:introduction}			%1
\input{src/intro.tex}

\section{Background}	%1 pg
\label{sec:background}	
\input{src/background.tex}

\section{Tradeoffs in parallelism for device-heterogeneous systems}
\label{sec:analysis}
\input{src/analysis.tex}
%%\section{Design of device-level heterogeneous systems}
%%\label{sec:design}
%%%\input{src/design.tex}			%General 	
%\input{src/core-heterogeneity1.tex}	%ISLPED 2011	%1 pg
%\input{src/core-heterogeneity2.tex}	% CODES 2012 	%2 pg
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%\section{Related work}
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%\label{sec:acknowledgment}
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\section*{Note to the Reviewers} 
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